Output Voltage Ripple Reduction in a Symmetric Multistage-Stacked Boost Architecture (MSBA) Converter

Rosas-caro, Julio

doi:10.3390/electronics10040394

Output Voltage Ripple Reduction in a Symmetric Multistage-Stacked Boost Architecture (MSBA) Converter

Journal

Electronics

ISSN

2079-9292

Date Issued

2021

Author(s)

Rosas-caro, Julio

Facultad de Ingeniería - CampGDL

Type

text::journal::journal article

DOI

10.3390/electronics10040394

URL

https://scripta.up.edu.mx/handle/20.500.12552/2964

Abstract

This article proposes a different operation mode in a recently proposed converter, the multistage-stacked boost architecture (MSBA) converter working under the symmetric operation mode. The operation mode of the converter is analyzed with a modified pulse width modulation (PWM) scheme, in which the switching function of transistors is obtained from an interleaved scheme. The results show that the modified PWM results in a similar operation of the converter, with a reduced output voltage ripple, without increasing the switching frequency. A mathematical model of the converter is provided, the output voltage ripple calculation is performed in the traditional, and the modified PWM scheme, simulation, and experimental results are provided to verify the operation mode and the obtained equations.